STM32H745 Dual-Core Guide: Running Cortex-M7 and Cortex-M4 Simultaneously

A complete practical guide to setting up and running both cores of the STM32H745 simultaneously. Covers AMP architecture, CubeIDE project setup, HSEM inter-core communication, and real-world use cases for the NVX-H7 Pro and NVX-H7 Compact boards.

<p>The STM32H745 is one of the most capable microcontrollers STMicroelectronics has ever produced. It contains two independent processor cores — a Cortex-M7 running at up to 480MHz and a Cortex-M4 running at up to 240MHz — and both can execute code at the same time. This is not a marketing feature. It is a genuinely useful architectural capability that changes how you design embedded systems.</p>

<p>In this guide we cover exactly how the dual-core system works, how to set it up in STM32CubeIDE, how the two cores communicate, and when you should actually use both cores versus sticking with just the M7.</p>

<p>This guide applies directly to the <strong>NVX-H7 Compact</strong> and <strong>NVX-H7 Pro</strong> boards from Nvixeon, both of which are built around the STM32H745.</p>

<h2>Understanding the STM32H745 Architecture</h2>

<h3>Two Cores, One Chip</h3>
<p>The STM32H745 uses an Asymmetric Multi-Processing (AMP) architecture. Unlike symmetric multi-processing where cores run the same OS and share a task scheduler, AMP means each core runs its own independent firmware. The M7 runs one program. The M4 runs a completely different program. They share peripherals and memory but operate independently.</p>

<ul>
<li><strong>Cortex-M7:</strong> up to 480MHz, 1MB ITCM, 128KB DTCM, FPU, DSP, 6-stage pipeline with branch prediction</li>
<li><strong>Cortex-M4:</strong> up to 240MHz, FPU, DSP, access to most peripherals</li>
<li><strong>Shared SRAM:</strong> 512KB SRAM1 + 512KB SRAM2 accessible to both cores</li>
<li><strong>Hardware semaphores (HSEM):</strong> 32 hardware semaphores for inter-core synchronisation</li>
</ul>

<h3>Which Core Boots First?</h3>
<p>The Cortex-M7 is the boot master. It starts first and is responsible for initialising the system, setting up clocks, and then releasing the Cortex-M4 from its hold state. The M4 cannot start executing until the M7 explicitly allows it.</p>

<h2>Setting Up a Dual-Core Project in STM32CubeIDE</h2>

<h3>Step 1 — Create a New Project</h3>
<p>Open STM32CubeIDE and create a new project. When the target selector appears, search for STM32H745 and select the correct variant for your board. When CubeMX asks which core to configure, select Cortex-M7 first.</p>

<h3>Step 2 — Configure Clocks on the M7 Side</h3>
<p>All clock configuration must be done on the M7. In the Clock Configuration tab, set the system clock to 480MHz using PLL1. Set the M4 clock to 240MHz using PLL2.</p>

<h3>Step 3 — Assign Peripherals to Cores</h3>
<p>In STM32CubeMX, each peripheral has a core assignment. The general rule:</p>
<ul>
<li>Assign high-bandwidth peripherals (Ethernet, USB HS, display) to the M7</li>
<li>Assign real-time peripherals (PWM timers, CAN, UART) to the M4</li>
<li>Mark shared resources as shared and protect access with HSEM</li>
</ul>

<h3>Step 4 — Release the M4 from M7 Firmware</h3>
<p>In your M7 main.c, after completing system initialisation, release the M4:</p>

<pre><code>__HAL_RCC_HSEM_CLK_ENABLE();
HAL_HSEM_FastTake(HSEM_ID_0);
HAL_HSEM_Release(HSEM_ID_0, 0);
</code></pre>

<h2>Inter-Core Communication Using HSEM</h2>
<p>The STM32H745 includes 32 hardware semaphores. These are atomic lock mechanisms that prevent both cores from accessing the same resource simultaneously.</p>

<pre><code>// M7 — write shared data
HAL_HSEM_FastTake(0);
shared_buffer[0] = sensor_value;
HAL_HSEM_Release(0, 0);

// M4 — read shared data
while (HAL_HSEM_FastTake(0) != HAL_OK) {}
uint32_t value = shared_buffer[0];
HAL_HSEM_Release(0, 0);
</code></pre>

<h2>Practical Use Cases</h2>

<h3>Ethernet Gateway with Real-Time Motor Control</h3>
<ul>
<li><strong>M7:</strong> lwIP TCP/IP stack, MQTT, web dashboard</li>
<li><strong>M4:</strong> FOC motor control loop at 20kHz, encoder reading, PID controller</li>
<li><strong>Shared:</strong> motor setpoint and telemetry via HSEM-protected shared SRAM</li>
</ul>

<h3>Display HMI with CAN Bus Logging</h3>
<ul>
<li><strong>M7:</strong> LTDC display driver, touch input, UI rendering</li>
<li><strong>M4:</strong> FDCAN receive/transmit, message parsing, alarm detection</li>
</ul>

<h2>When to Use Both Cores</h2>
<p>Use both cores when you have two genuinely independent tasks where one has hard real-time requirements and the other has high average CPU load. Stick with just the M7 when your application is straightforward and FreeRTOS task switching is sufficient.</p>

<h2>Summary</h2>
<ul>
<li>STM32H745 uses AMP — each core runs independent firmware</li>
<li>M7 is the boot master — it releases the M4 after initialisation</li>
<li>Peripherals are assigned to cores in STM32CubeMX</li>
<li>HSEM provides atomic inter-core synchronisation</li>
<li>Best use: real-time control on M4, connectivity and display on M7</li>
</ul>

<p>The <a href=”/products”>NVX-H7 Pro</a> and <a href=”/products”>NVX-H7 Compact</a> from Nvixeon are built on the STM32H745 and include full pinout diagrams, schematics, and dual-core example firmware. If you are ready to build on this architecture, start there.</p>