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STM32H745 Dual-Core Guide: Running Cortex-M7 and Cortex-M4 Simultaneously

A complete practical guide to setting up and running both cores of the STM32H745 simultaneously. Covers AMP architecture, CubeIDE project setup, HSEM inter-core communication, and real-world use cases for the NVX-H7 Pro and NVX-H7 Compact boards.

The STM32H745 is one of the most capable microcontrollers STMicroelectronics has ever produced. It contains two independent processor cores — a Cortex-M7 running at up to 480MHz and a Cortex-M4 running at up to 240MHz — and both can execute code at the same time. This is not a marketing feature. It is a genuinely useful architectural capability that changes how you design embedded systems.

In this guide we cover exactly how the dual-core system works, how to set it up in STM32CubeIDE, how the two cores communicate, and when you should actually use both cores versus sticking with just the M7.

This guide applies directly to the NVX-H7 Compact and NVX-H7 Pro boards from Nvixeon, both of which are built around the STM32H745.


Understanding the STM32H745 Architecture

Two Cores, One Chip

The STM32H745 uses an Asymmetric Multi-Processing (AMP) architecture. Unlike symmetric multi-processing where cores run the same OS and share a task scheduler, AMP means each core runs its own independent firmware. The M7 runs one program. The M4 runs a completely different program. They share peripherals and memory but operate independently.

  • Cortex-M7: up to 480MHz, 1MB ITCM, 128KB DTCM, FPU, DSP, 6-stage pipeline with branch prediction
  • Cortex-M4: up to 240MHz, FPU, DSP, access to most peripherals
  • Shared SRAM: 512KB SRAM1 + 512KB SRAM2 accessible to both cores
  • Hardware semaphores (HSEM): 32 hardware semaphores for inter-core synchronisation

Which Core Boots First?

The Cortex-M7 is the boot master. It starts first and is responsible for initialising the system, setting up clocks, and then releasing the Cortex-M4 from its hold state. The M4 cannot start executing until the M7 explicitly allows it.


Setting Up a Dual-Core Project in STM32CubeIDE

Step 1 — Create a New Project

Open STM32CubeIDE and create a new project. When the target selector appears, search for STM32H745 and select the correct variant for your board. When CubeMX asks which core to configure, select Cortex-M7 first.


Step 2 — Configure Clocks on the M7 Side

All clock configuration must be done on the M7. In the Clock Configuration tab, set the system clock to 480MHz using PLL1. Set the M4 clock to 240MHz using PLL2.


Step 3 — Assign Peripherals to Cores

In STM32CubeMX, each peripheral has a core assignment. The general rule:

  • Assign high-bandwidth peripherals (Ethernet, USB HS, display) to the M7
  • Assign real-time peripherals (PWM timers, CAN, UART) to the M4
  • Mark shared resources as shared and protect access with HSEM

Step 4 — Release the M4 from M7 Firmware

In your M7 main.c, after completing system initialisation, release the M4:

__HAL_RCC_HSEM_CLK_ENABLE();
HAL_HSEM_FastTake(HSEM_ID_0);
HAL_HSEM_Release(HSEM_ID_0, 0);

Inter-Core Communication Using HSEM

The STM32H745 includes 32 hardware semaphores. These are atomic lock mechanisms that prevent both cores from accessing the same resource simultaneously.

 // M7 — write shared data
HAL_HSEM_FastTake(0);
shared_buffer[0] = sensor_value;
HAL_HSEM_Release(0, 0);

// M4 — read shared data
while (HAL_HSEM_FastTake(0) != HAL_OK) {}
uint32_t value = shared_buffer[0];
HAL_HSEM_Release(0, 0);

Practical Use Cases

Ethernet Gateway with Real-Time Motor Control

  • M7: lwIP TCP/IP stack, MQTT, web dashboard
  • M4: FOC motor control loop at 20kHz, encoder reading, PID controller
  • Shared: motor setpoint and telemetry via HSEM-protected shared SRAM

Display HMI with CAN Bus Logging

  • M7: LTDC display driver, touch input, UI rendering
  • M4: FDCAN receive/transmit, message parsing, alarm detection

When to Use Both Cores

Use both cores when you have two genuinely independent tasks where one has hard real-time requirements and the other has high average CPU load. Stick with just the M7 when your application is straightforward and FreeRTOS task switching is sufficient.


Summary

  • STM32H745 uses AMP — each core runs independent firmware
  • M7 is the boot master — it releases the M4 after initialisation
  • Peripherals are assigned to cores in STM32CubeMX
  • HSEM provides atomic inter-core synchronisation
  • Best use: real-time control on M4, connectivity and display on M7 

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